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Rich Salzd2e9e322016-05-17 14:51:26 -04001/*
2 * Copyright 2011-2016 The OpenSSL Project Authors. All Rights Reserved.
3 *
4 * Licensed under the OpenSSL license (the "License"). You may not use
5 * this file except in compliance with the License. You can obtain a copy
6 * in the file LICENSE in the source distribution or at
7 * https://www.openssl.org/source/license.html
8 */
9
Andy Polyakov87873f42011-07-17 17:40:29 +000010#include <stdio.h>
11#include <stdlib.h>
12#include <string.h>
13#include <setjmp.h>
14#include <signal.h>
Andy Polyakov313e6ec2015-04-02 10:17:42 +020015#include <openssl/crypto.h>
Andy Polyakov87873f42011-07-17 17:40:29 +000016
17#include "arm_arch.h"
18
Matt Caswell0f113f32015-01-22 03:40:55 +000019unsigned int OPENSSL_armcap_P = 0;
Andy Polyakov87873f42011-07-17 17:40:29 +000020
Andy Polyakovc1669e12014-11-07 22:48:22 +010021#if __ARM_MAX_ARCH__<7
Matt Caswell0f113f32015-01-22 03:40:55 +000022void OPENSSL_cpuid_setup(void)
23{
24}
25
26unsigned long OPENSSL_rdtsc(void)
27{
28 return 0;
29}
Andy Polyakovc1669e12014-11-07 22:48:22 +010030#else
Andy Polyakov87873f42011-07-17 17:40:29 +000031static sigset_t all_masked;
32
33static sigjmp_buf ill_jmp;
Matt Caswell0f113f32015-01-22 03:40:55 +000034static void ill_handler(int sig)
35{
36 siglongjmp(ill_jmp, sig);
37}
Andy Polyakov87873f42011-07-17 17:40:29 +000038
39/*
40 * Following subroutines could have been inlined, but it's not all
41 * ARM compilers support inline assembler...
42 */
43void _armv7_neon_probe(void);
Andy Polyakov4afa9f02014-05-04 10:55:49 +020044void _armv8_aes_probe(void);
45void _armv8_sha1_probe(void);
46void _armv8_sha256_probe(void);
47void _armv8_pmull_probe(void);
Andy Polyakove8d93e32014-06-01 17:21:06 +020048unsigned long _armv7_tick(void);
Andy Polyakov87873f42011-07-17 17:40:29 +000049
Andy Polyakove8d93e32014-06-01 17:21:06 +020050unsigned long OPENSSL_rdtsc(void)
Matt Caswell0f113f32015-01-22 03:40:55 +000051{
52 if (OPENSSL_armcap_P & ARMV7_TICK)
53 return _armv7_tick();
54 else
55 return 0;
56}
Andy Polyakov87873f42011-07-17 17:40:29 +000057
Andy Polyakov9b05cbc2015-01-05 11:25:10 +010058# if defined(__GNUC__) && __GNUC__>=2
59void OPENSSL_cpuid_setup(void) __attribute__ ((constructor));
60# endif
Andy Polyakove8d93e32014-06-01 17:21:06 +020061/*
62 * Use a weak reference to getauxval() so we can use it if it is available but
63 * don't break the build if it is not.
64 */
Andy Polyakov9b05cbc2015-01-05 11:25:10 +010065# if defined(__GNUC__) && __GNUC__>=2 && defined(__ELF__)
Matt Caswell0f113f32015-01-22 03:40:55 +000066extern unsigned long getauxval(unsigned long type) __attribute__ ((weak));
67# else
68static unsigned long (*getauxval) (unsigned long) = NULL;
69# endif
Andy Polyakove8d93e32014-06-01 17:21:06 +020070
71/*
72 * ARM puts the the feature bits for Crypto Extensions in AT_HWCAP2, whereas
73 * AArch64 used AT_HWCAP.
74 */
Matt Caswell0f113f32015-01-22 03:40:55 +000075# if defined(__arm__) || defined (__arm)
76# define HWCAP 16
77 /* AT_HWCAP */
78# define HWCAP_NEON (1 << 12)
Andy Polyakove8d93e32014-06-01 17:21:06 +020079
Matt Caswell0f113f32015-01-22 03:40:55 +000080# define HWCAP_CE 26
81 /* AT_HWCAP2 */
82# define HWCAP_CE_AES (1 << 0)
83# define HWCAP_CE_PMULL (1 << 1)
84# define HWCAP_CE_SHA1 (1 << 2)
85# define HWCAP_CE_SHA256 (1 << 3)
86# elif defined(__aarch64__)
87# define HWCAP 16
88 /* AT_HWCAP */
89# define HWCAP_NEON (1 << 1)
Andy Polyakove8d93e32014-06-01 17:21:06 +020090
Matt Caswell0f113f32015-01-22 03:40:55 +000091# define HWCAP_CE HWCAP
92# define HWCAP_CE_AES (1 << 3)
93# define HWCAP_CE_PMULL (1 << 4)
94# define HWCAP_CE_SHA1 (1 << 5)
95# define HWCAP_CE_SHA256 (1 << 6)
96# endif
Andy Polyakove8d93e32014-06-01 17:21:06 +020097
Andy Polyakov87873f42011-07-17 17:40:29 +000098void OPENSSL_cpuid_setup(void)
Matt Caswell0f113f32015-01-22 03:40:55 +000099{
100 char *e;
101 struct sigaction ill_oact, ill_act;
102 sigset_t oset;
103 static int trigger = 0;
Andy Polyakov87873f42011-07-17 17:40:29 +0000104
Matt Caswell0f113f32015-01-22 03:40:55 +0000105 if (trigger)
106 return;
107 trigger = 1;
Andy Polyakov87873f42011-07-17 17:40:29 +0000108
Matt Caswell0f113f32015-01-22 03:40:55 +0000109 if ((e = getenv("OPENSSL_armcap"))) {
110 OPENSSL_armcap_P = (unsigned int)strtoul(e, NULL, 0);
111 return;
112 }
Andy Polyakov87873f42011-07-17 17:40:29 +0000113
Andy Polyakov8653e782017-02-15 12:01:09 +0100114# if defined(__APPLE__) && !defined(__aarch64__)
115 /*
116 * Capability probing by catching SIGILL appears to be problematic
117 * on iOS. But since Apple universe is "monocultural", it's actually
118 * possible to simply set pre-defined processor capability mask.
119 */
120 if (1) {
121 OPENSSL_armcap_P = ARMV7_NEON;
122 return;
123 }
124 /*
125 * One could do same even for __aarch64__ iOS builds. It's not done
126 * exclusively for reasons of keeping code unified across platforms.
127 * Unified code works because it never triggers SIGILL on Apple
128 * devices...
129 */
130# endif
131
Matt Caswell0f113f32015-01-22 03:40:55 +0000132 sigfillset(&all_masked);
133 sigdelset(&all_masked, SIGILL);
134 sigdelset(&all_masked, SIGTRAP);
135 sigdelset(&all_masked, SIGFPE);
136 sigdelset(&all_masked, SIGBUS);
137 sigdelset(&all_masked, SIGSEGV);
Andy Polyakov87873f42011-07-17 17:40:29 +0000138
Matt Caswell0f113f32015-01-22 03:40:55 +0000139 OPENSSL_armcap_P = 0;
Andy Polyakov87873f42011-07-17 17:40:29 +0000140
Matt Caswell0f113f32015-01-22 03:40:55 +0000141 memset(&ill_act, 0, sizeof(ill_act));
142 ill_act.sa_handler = ill_handler;
143 ill_act.sa_mask = all_masked;
Andy Polyakov87873f42011-07-17 17:40:29 +0000144
Matt Caswell0f113f32015-01-22 03:40:55 +0000145 sigprocmask(SIG_SETMASK, &ill_act.sa_mask, &oset);
146 sigaction(SIGILL, &ill_act, &ill_oact);
Andy Polyakove8d93e32014-06-01 17:21:06 +0200147
Matt Caswell0f113f32015-01-22 03:40:55 +0000148 if (getauxval != NULL) {
149 if (getauxval(HWCAP) & HWCAP_NEON) {
150 unsigned long hwcap = getauxval(HWCAP_CE);
Andy Polyakove8d93e32014-06-01 17:21:06 +0200151
Matt Caswell0f113f32015-01-22 03:40:55 +0000152 OPENSSL_armcap_P |= ARMV7_NEON;
Andy Polyakove8d93e32014-06-01 17:21:06 +0200153
Matt Caswell0f113f32015-01-22 03:40:55 +0000154 if (hwcap & HWCAP_CE_AES)
155 OPENSSL_armcap_P |= ARMV8_AES;
Andy Polyakove8d93e32014-06-01 17:21:06 +0200156
Matt Caswell0f113f32015-01-22 03:40:55 +0000157 if (hwcap & HWCAP_CE_PMULL)
158 OPENSSL_armcap_P |= ARMV8_PMULL;
Andy Polyakove8d93e32014-06-01 17:21:06 +0200159
Matt Caswell0f113f32015-01-22 03:40:55 +0000160 if (hwcap & HWCAP_CE_SHA1)
161 OPENSSL_armcap_P |= ARMV8_SHA1;
Andy Polyakov87873f42011-07-17 17:40:29 +0000162
Matt Caswell0f113f32015-01-22 03:40:55 +0000163 if (hwcap & HWCAP_CE_SHA256)
164 OPENSSL_armcap_P |= ARMV8_SHA256;
165 }
166 } else if (sigsetjmp(ill_jmp, 1) == 0) {
167 _armv7_neon_probe();
168 OPENSSL_armcap_P |= ARMV7_NEON;
169 if (sigsetjmp(ill_jmp, 1) == 0) {
170 _armv8_pmull_probe();
171 OPENSSL_armcap_P |= ARMV8_PMULL | ARMV8_AES;
172 } else if (sigsetjmp(ill_jmp, 1) == 0) {
173 _armv8_aes_probe();
174 OPENSSL_armcap_P |= ARMV8_AES;
175 }
176 if (sigsetjmp(ill_jmp, 1) == 0) {
177 _armv8_sha1_probe();
178 OPENSSL_armcap_P |= ARMV8_SHA1;
179 }
180 if (sigsetjmp(ill_jmp, 1) == 0) {
181 _armv8_sha256_probe();
182 OPENSSL_armcap_P |= ARMV8_SHA256;
183 }
184 }
185 if (sigsetjmp(ill_jmp, 1) == 0) {
186 _armv7_tick();
187 OPENSSL_armcap_P |= ARMV7_TICK;
188 }
189
190 sigaction(SIGILL, &ill_oact, NULL);
191 sigprocmask(SIG_SETMASK, &oset, NULL);
192}
Andy Polyakovc1669e12014-11-07 22:48:22 +0100193#endif